21-09-2003 09:24									#1
	Intel's Prescott will be 64-bit Support Apolyton buy from Amazon

This has been widely known for some time thanks to Hans de Vries's excellent analysis of leaked die photos of Prescott. But now, according to The Inquirer, an Intel executive has also confirmed it via word-of-mouth: http://www.theinquirer.net/?article=11668

quote: Prescott has 64-bit compatibility built in Needles and pincers By Charlie Demerjian: Saturday 20 September 2003, 13:07 SINCE WE published the pins and needling story yesterday, the black shirted moles have come out of the woodwork about the innards of Prescott. Those little critters can't stop talking. The power people told us how many pins they needed, months ago, a crazed genius told us about Prescott's die here and here, and lots of people told us that to count said non-power pins. Peeks into the bios code told us more. Motherboard people strongly denied it, and winked at us. Something was up, it was coming from too many directions. Four strong sources, but no smoking gun. Then, in an anti-climactic burst from out of left field, it all hit at once. Someone came up to me and said 'Guess what I just heard a senior Intel executive say'. Talk about months of hard work ruined by a person who happened on the story of the year. That said, you heard it here first yesterday, Prescott has 64-bit functionality in it. Hans DeVries was dead on. This answer poses 2 more questions. The first is what instruction set do they use? The AMD64 instruction extensions are theirs to use because of licensing agreements with AMD, but we think they would sooner eat the IDF press room food than do that. MS has been long rumored to tell Intel what they can and can not do, and their record in confrontations like this are not one to bet against. Rumor has it that the vole has said that they will only support a single 64-bit extension to IA32, but then months ago they said they would be supporting 5 64-bit architectures in windows. The mystery deepens. The more important thing is Itanium. Word on the show floor is that every Intel person thinks that now is the time, and soon they hope to sell more than 4 digits worth (the number of zeros, not the number of fingers, we aren't THAT cynical) of machines in a quarter. The buzz among those with a vested interest is palpable. Performance in a lot of benchmarks is definitely there, but the market still seems to be in the 'dip a toe in' stage. Consumer response, and the response of vendors shows marginal interest. So the burning question is, will Intel officially tell the world about the 64-bit extensions, and gut the chances of Itanium taking off, or will they sit on it? AMD will most likely determine how and when the 64-bit code gets unveiled, but don't hold your breath. It takes a lot of market share erosion to dump that many years of R&D, and from the looks of it, that isn't happening.

The hard evidence is already there (by Hans de Vrie)

quote: Clue 1: The second Integer Unit has no AGU's (Fast double clocked Address Generator Units) This unit provides the address bits 32 and higher. We will show that there is no need to provide these bits very fast in the NetBurst Architecture with its replay capabilities. nor do we need all bits 32 through 63 A virtual address size of 40 or 48 bits would be sufficient for the time being. (It's 48 bits in the first implementation of the Hammer family)

quote: Clue 2: The second Integer Unit register file has a smaller size, 1.30 x 0.64 mm versus 1.30 x 0.71 mm The (renamed) register file of the Pentium 4 has 128 entries for 32 bit data plus 6 bit status flags. We could show that Prescott has two 256 entry register files. The width of the two is equal meaning that they have the same number of entries. The height of the second one is however less, indicating that is has less data bits per entry. We presume that it has all its 32 data bits but that the 6 status flags are lacking. A 64 bit processor needs only one set of status flags per 64 bit word. This clue also implies that the second core can not be used to run an independent 32 bit thread.

quote: Clue 3: The data caches have been shifted in order to balance a critical path in 64 bit processing The first core has to provide the address bits for the data caches of both cores. Most critical in Northwood are bits 6..11 that select one of 32 cache lines in a 2k page and bits 12..16 that are used to predict which of the 4 ways contains the cache line ( 4 x 2kByte = 8 kByte cache size ). These paths should be as short as possible. Going from one core to another introduces a long path for this critical signal. However, it turns out that the path to both caches are equal in length. They managed to do this by shifting both caches upwards.

Should be an interesting couple of months.

	21-09-2003 09:27									#2
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wats going to be the clockspeed?

	21-09-2003 09:27									#3
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Really cheap P4s around the bend. Excellent.

	21-09-2003 09:33									#4
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quote: Originally posted by Zero wats going to be the clockspeed?

3.4GHz at launch (October 26th).

	21-09-2003 09:33									#5
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Si!

	21-09-2003 09:45									#6
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In case anyone's wondering, at best this is a currently disabled version of the AMD-64's instruction set that I don't see Intel enabling for 6 months or more. Since launching a Prescott chip with AMD's 64 bit instruction set will kill Itanium sales, Intel won't do it until they are absolutely forced to. Realisticly there is no way that the Itanium instruction set could be stuck on the Prescott. It takes up most of the space on the much large Itanium, and there simply isn't room on a desktop chip.

A third instruction set would require software support, including driver support, and there is no is no way Intel could keep this secret. You'd be looking at us knowing for sure about such an instruction set a least eight months before the chip was released, if not longer. Its highly unlikely that Intel would stick such support on the chip if it couldn't be enabled for 8 months, since it would take up alot of space.

	21-09-2003 09:48									#7
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It's certainly x86-64, since that's what AMD spent money on getting developed and Intel doesn't have to pay any licensing fees for it due to cross-licensing.

Intel knows either way a cheap 64-bit x86 CPU is going to be out there, and they'd rather they profit from it instead of AMD.

It's likely that they don't enable it for a while (like they did with HyperThreading), but it's also possible that it's x86-64 compatible on launch.

And as for Intel keeping it a secrent -- they haven't, really. The 64-bit technology on x86 is called Yamhill and has been well known for 2(?) years.

And I'm not sure why so many people think x86-64 support takes up a lot of space. AMD executives have said adding 64-bit support took up less than a 10% increase in die space. And the logic for HyperThreading that was left dormant in most P4s took up around the same amount of space.

And the Itanium core itself isn't so big, it's the 3MB, 6MB, and 9MB of on-die cache that make it so huge.

	21-09-2003 10:00									#8
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"64-bit functionality"?

	21-09-2003 10:07									#9
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Denial through semantics? Interesting, if not pathetically weak.

quote: func·tion·al·i·ty ( P ) Pronunciation Key (fngksh-nl-t) n. 1. The quality of being functional. 2. A useful function within a computer application or program. 3. The capacity of a computer program or application to provide a useful function.

	21-09-2003 10:09									#10
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I can see it now: approximately 300 hardcore computer geeks getting a hardon about their new processor being able to handle 64 bit code.

In other words--when will we see software and OSes with 64 bit code functions?

	21-09-2003 10:10									#11
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Early 2004, the Windows XP x86-64 edition appears. Unreal Tournament's engine will support 64-bits, as will most workstation apps.

	21-09-2003 10:12									#12
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quote: Originally posted by Asher It's likely that they don't enable it for a while (like they did with HyperThreading), but it's also possible that it's x86-64 compatible on launch.

I simply don't see it. Intel would have to accept that their Itanium sales would be killed, and PC retailers such as HP would be outraged. I don't see Intel switching until they are forced to since they are getting killed in sales. Its also distinctly probable that this is a bs rumor and the Inquirer is up to their usual entertaining but baseless speculation.

	21-09-2003 10:16									#13
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Itanium and Pentium 4s/Xeons are in fundamentally different markets.

Specifically, the Pentium 4s don't need to go through nearly as much thermal restrictrions and data integrity testing.

They also don't really pose a threat because Itanium will have massive amounts of cache that the Pentium 4s and Xeons don't get, the Itanium's 64-bitness is cleaner and doesn't deal with the stupid x86 restrictions and overhead, and Itanium's also heading in the multi-core direction while it'll be many more years for that to be part of Pentiums.

And I also don't see what Itanium sales would be killed anyway, do you know how few of them have sold.

	21-09-2003 11:25									#14
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quote: Originally posted by Asher And I also don't see what Itanium sales would be killed anyway, do you know how few of them have sold.

You have a point there. The press isn't calling it the Itanic for nothing. I don't see Intel admitting their white elephant is a failure any time soon though. Widespread adoption of the AMD x86-64 instruction set would be likely to kill future prospects of software being ported to the Itanium, since it would look like the x86-64 instruction set is going to be dominent. Specialized applications where the software needs to be customized anyways might still be sold, but that's a very niche market.

	21-09-2003 11:29									#15
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That first sight you linked to is one of the most frightening things I've yet seen.